Download Computer Logic: Design Principles and Applications by John Y. Hsu PDF

By John Y. Hsu

An figuring out of contemporary laptop common sense - incorporating center wisdom of quantity platforms, quantity conversions, Boolean algebra, stories, and good judgment circuits - is key to additional learn of desktop architectures, procedure software program, and laptop networks. Computer good judgment: Design ideas and Applications introduces and describes the proper recommendations, ideas and functions of contemporary computing device good judgment layout. The publication is self-contained, with an introductory bankruptcy that concisely covers the heritage of computing units, in addition to quantity structures, quantity conversions, signed and unsigned integers, exterior code, and electronic and digitizing strategies. committed chapters on Boolean algebra, transistor circuits, combinatorial common sense circuits, and sequential good judgment circuits around off the paintings. The emphasis is on layout and applications.

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Remember, a don't care is selected only if it can help simplify a function. 7(b); each don't care is a hyphen in the map. As we can see, three of the six don't cares are chosen to simplify t9, so we eliminate both Band C by grouping t9 in a square as follows: t9 = = C3 \C2 \C 1 CO + C3 \C2 C 1 CO + C3 C2 \C 1 CO + C3 C2 C 1 CO C3 CO Using positive logic, the preceding equation says that when the outputs C3 and CO are high, the timing state t9 is high, that is, it is true. 9. The timing state t8 from a decade counter is high if the counter reaches count 8, just as t9 indicates count 9.

Each pulse starts from a low voltage and goes to a high voltage then back to a low voltage. The four output variables are denoted as C3, C2, Cl, CO where C is the mnemonic for count and CO is its lsb. While counting is in progress, the voltage level of each output variable may be low or high as a function of time. At any instant, the four counting variables constitute a binary number with a value ranging from 0 to 9. If the t9 signal is used to represent the timing state when the counter reaches count 9, we can decode t9 out using a single AND gate.

If the number of 1s in the input variables is an odd number, one particular product is 1 and so is the parity. That is, the output parity bit makes the total number of 1s an even number. Assume that X = 1; Y = 1; and Z = 1. Obviously, the number of Is in the complete product is three, an odd number. As seen in the equation, the first three complete products as Os but the last complete product is 1, so the parity output is 1. In the following, we develop the general parity theorem; its proof is left as an exercise.

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